LIBRARY IEEE; 
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

--Circuitos Logicos com 6 portas de 1 entrada

ENTITY ic_2 IS

    PORT(pin1, pin3, pin5, pin9, pin11, pin13: IN STD_LOGIC; 
        pin2, pin4, pin6, pin8, pin10, pin12: OUT STD_LOGIC);

END ic_2;

ARCHITECTURE equal_ic OF ic_2 IS

BEGIN

    pin2 <= pin1;
    pin4 <= pin3;
    pin6 <= pin5;
    pin8 <= pin9;
    pin10 <= pin11;
    pin12 <= pin13;

END equal_ic;

ARCHITECTURE not_ic OF ic_2 IS

BEGIN

    pin2 <= NOT pin1;
    pin4 <= NOT pin3;
    pin6 <= NOT pin5;
    pin8 <= NOT pin9;
    pin10 <= NOT pin11;
    pin12 <= NOT pin13;

END not_ic;


